Tezzaron in the News: 2007 Dec31 By Webmaster • Posted in Tezzaron in the News December 31, 2007 October 2007: $50 3D Bonding Coming?? (Perspectives from the Leading Edge) October 2007: IC Packages Feel the Squeeze (Electronic Design) June 2007: Tezzaron, Chartered working on 2D “iRAM” hybrid, 3D ICs to come (Wafer News) June 2007: Chartered, Tezzaron team for high-speed 3D memory chips (EDN) June 2007: Design in … [Read More]
Chartered, Tezzaron Team Up to Deliver Ultra High-Speed Memory Solution Jun12 By Webmaster • Posted in Press Releases June 12, 2007 Leading foundry, innovative chip designer will also collaborate on breakthrough 3D ICs using wafer stacking approach MILPITAS, Calif. – June 12, 2007 Chartered Semiconductor Manufacturing (Nasdaq: CHRT and SGX-ST: Chartered), one of the world’s top dedicated foundries, and Tezzaron Semiconductor, a specialist in high-speed memory solutions and three-dimensional (3D) wafer stacking processes, … [Read More]
3D Super-Via for Memory Applications Jan31 By Webmaster • Posted in Documents January 31, 2007 A Tezzaron presentation from the 2007 Micro-Systems Packaging Initiative Workshop Download PDF: 3D Super-Via for Memory Applications Note: The demo video (3D-IC Microprocessor Prototype) referenced on page 16 is available here.
3-D Power Savings Jan31 By Webmaster • Posted in Documents January 31, 2007 A Tezzaron white paper: brief discussion of power savings enabled by 3D Download PDF: 3-D Power Savings
Tezzaron in the News: 2006 Dec31 By Webmaster • Posted in Tezzaron in the News December 31, 2006 October 2006: Designing in the Third Dimension (EDN Asia) October 2006: Wafer-Level 3-D Integration Moving Forward (Semiconductor International) August 2006: 3-D Requires System Rethink (EE Times) June 2006: Three-Dimensional Integrated Circuits and the Future of System-on-Chip Designs (Proceedings of the IEEE, Vol. 94, No. 6) March 2006: IME … [Read More]