Tezzaron FPGA DiagramFPGAs are used in all sorts of markets and all sorts of applications. The only question in high performance circles is, “Why haven’t they taken over completely?” The strongest reason is obvious: FPGAs have never offered enough internal memory. If copious high performance internal memory is needed, ASICs get the design win every time … until now.

FPGAs are already becoming multi-die subsystems. Adding memory is an obvious next step … but conventional memory is completely unsuitable for that job. Adding memory that is tailor-made for 2.5D and 3D integration is the only sensible play. Going for 2.5D, putting a memory die next to an FPGA in the same package, is getting one toe in the water. Stacking a 2D or 3D RAM on top (or under) the FPGA  does even more to address chip-to-chip interconnect delays and power. But what if Di3D design and fabrication techniques were used to build an FPGA with the memory bits, even the configuration storage elements, taken completely off the fast logic die used to implement all the active switching logic on the chip? What if the amplifiers and drivers for those bits were left on the fast logic die so that those remote bits were just as fast as they would have been if they were on the base die? How many more logic gates might that FPGA have for customers to program? How much more storage might be available? How much faster might the whole product be when bus lines that were once millimeters long are now microns long? How much less power might it consume? How much cheaper will the development project be for that chip that what it would have cost if achieving the same functionality was attempted with traditional 2D methods?

Or just forget the whole memory thing. How about if Di3D were simply used to multiply the number of gates on the FPGA die by adding vertical interconnects on gate-pitch so that routes could be programmed in three dimensions instead of just two?

We believe that after standalone 3D RAMs, FPGA products are the next logical home for Di3D technology and the most likely way for someone to take the next giant leap forward in the FPGA market.