Tezzaron at the Electronics Packaging Symposium Nov6 By Webmaster • Posted in Slide Presentations November 6, 2014 The 2014 Electronics Packaging Symposium was held Oct 8-9 at IEEC, Binghamton University, in New York. This year’s event covered several small-scale technologies, including 3D and 2.5D, and featured a 2.5D & 3D Packaging Workshop. Bob Patti of Tezzaron presented 2.5/3D Integration Technology and … [Read More]
More About 3D-TEST Nov3 By Webmaster • Posted in Industry News November 3, 2014 3D-TEST Workshop Does What Its Name Says: Concentrates On 3D-Test Good coverage of an important conference, reported by Erik Jan Marinissen of imec.
3D Test Oct30 By Webmaster • Posted in Industry News October 30, 2014 At the 5th Annual 3D Test Workshop (Seattle, 23-24 October 2014) Tezzaron’s Bob Patti took part in a lively panel discussion. The consensus was that built-in self test and built-in self repair are essential for stacked memory devices. Tezzaron obviously agrees — our robust … [Read More]
Tezzaron Presents DiRAM4 at MemCon Oct27 By Webmaster • Posted in Slide Presentations October 27, 2014 MemCon 2014, the memory industry’s premier technical and ecosystem event, was held on October 15 in Santa Clara, California. Tezzaron was a Silver Sponsor of the event. The proceedings are now available online, including DiRAM™ Architecture Overview by our own David … [Read More]
Looking Back on a Major Milestone Oct21 By Webmaster • Posted in Tezzaron in the News October 21, 2014 Ten years ago today — on 21 October 2004 — Tezzaron demonstrated the world’s first working 3D-IC! The device was a two-layer wafer-stacked chip with tungsten SuperContact™ (vertical interconnect). It was part of an in-house multi-project wafer stack containing six different 3D designs, all of which were first-pass functional. The first … [Read More]