Sub-Micron Wafer-to-Wafer Alignment Jun16 By Webmaster • Posted in Industry News June 16, 2014 Ziptronix and EVG have announced a new milestone in wafer-to-wafer alignment. This is great news for the 3D-IC industry – and also for Tezzaron, as we work very closely with both organizations. Francoise von Trapp discusses the achievement at some length in a [Read More]
Defining 3D Technologies May20 By Webmaster • Posted in Industry News May 20, 2014 The Knowledge Portal on 3D InCites features a number of informational posts, including this useful discussion of 3D and 2.5D technologies and terminologies. (The embedded video is also quite good.) See also this list … [Read More]
More on the Tezzaron/Fermilab collaboration May15 By Webmaster • Posted in Industry News May 15, 2014 This is the new 2D prototype of Fermilab’s VIPRAM chip. The final version is to be built in 3D. See article “A chip off the new board” [here].
Strong Growth in High Performance Memory May9 By David Chapman • Posted in Industry News May 9, 2014 DigiTimes forecasts strong growth in the high performance, high value memory market in 2014. “Powered by demand from the cloud computing and big data sectors, the bit-growth rate of server DRAM chips will grow by an annual rate of 27.2% in 2014, slightly lower than the 28.8% of a year earlier … [Read More]
A powerful argument for 3D memory May8 By Webmaster • Posted in Industry News May 8, 2014 How much of an SoC’s area is consumed by memory? Semiconductor Engineering’s Brian Bailey reports: “Today it is closer to 50% to 55%. We have seen a few cases where it is more than 85% of the chip area. The trend line is up and to the right.” “It is more expensive … [Read More]