Third Dimension Triples Processor Speed Dec6 By Webmaster • Posted in Press Releases December 6, 2004 Naperville, IL – 6 December 2004 Tezzaron Semiconductor has demonstrated a new 8051-based microprocessor that is 2 to 10 times faster than typical 8051 designs, running at speeds of up to 140 MHz under lab conditions. The microprocessor’s secret is its three-dimensional architecture: the processor is on one layer and 128 KBytes of SRAM are on another. Over one hundred thousand vertical connectors bind the two layers into a single device – a three-dimensional integrated circuit (3D IC). This is the first processor ever implemented as a 3D IC. Evaluation units have already been delivered to a select group of potential customers. The new chip is built in Tezzaron’s FaStack™ wafer stacking process. Because the memory is layered on top of the processor, chip area and wire length are kept to a minimum. The bare chip, manufactured in a 180 nm process, measures a mere 3.7 x 3.6 mm; the finished device is packaged in a standard 132 PGA. Extremely short vertical connections provide very quick access to the SRAM, which can run at 225 MHz with less than 3 nanosecond latency. Keeping all the memory on-chip also reduces power requirements; Tezzaron’s device uses about 1/10 the power of a typical 8051 with external memory. The microprocessor core uses a RISC instruction set, so most instructions are single-cycle, with a typical interrupt latency of just one clock cycle. To maximize performance, the SRAM is loaded from an external serial ROM at reset. Tezzaron added floating-point and 32-bit functionality to this “Super-8051,” a ten-million transistor design targeting high-end embedded applications. Future versions will incorporate more memory layers for up to 512 KBytes of SRAM on each chip. Tezzaron’s patented FaStack™ process builds vertical connectors into each wafer, aligns the wafers, and bonds them with copper. The wafer stacks are diced into multi-layer chips. Within each chip, tens of thousands of interconnects allow the layers to communicate vertically as well as horizontally. In the current design, hundreds of those interconnects carry data between the processor and the SRAM. The same process could be used to accelerate larger, more advanced processors. Today’s most powerful processors are hamstrung by slow memory access, often spending more time waiting than working. By building tightly integrated layers of memory on top of each processor, a FaStack™ design could eliminate most of the wait cycles and enable huge gains in performance. Tezzaron’s revolutionary FaStack™ process was developed and performed by their elite Process Development team in Singapore. The processor and memory circuits were built onto wafers by MagnaChip in Korea. The processor’s innovative 3D design, layout, and testing were done by Tezzaron’s Design Engineering team in Illinois. About Tezzaron™ Tezzaron Semiconductor is a privately held corporation with offices in Illinois and Singapore. For more information, visit www.tezzaron.com. Copyright © 2004-2009 Tezzaron® Semiconductor. All rights reserved. Revised: July 08, 2013