Tezzaron® Unveils 3D SRAM

Jan24

By Webmaster • Posted in Press Releases

January 24, 2005

Third 3D IC Confirms FaStack™ Process

Naperville – 24 January 2005

Tezzaron Semiconductor has built a 1 Megabit SRAM as a three-dimensional integrated circuit (3D IC). This new device, the third design to be built in Tezzaron’s FaStack wafer stacking process, uses a 100-pin TQFP package with industry standard pinout and interface.

Tezzaron feels that the success of its first three 3D ICs clearly demonstrates the reliability of its process. The first device, a simple register file, demonstrated reprogrammable memory in a 3D format. The second, a “super-8051,” combined a revved-up microprocessor with 128 KBytes of integrated SRAM. The latest, an evaluation SRAM, paves the way for denser, faster memory chips. Within the year, Tezzaron plans to build memory devices with extremely high performance and capacities as large as 144 Megabits.

The current 3D ICs are two-layer parts cut from two-wafer stacks. Tezzaron has already created four-wafer mechanical stacks and demonstrated electrical connectivity in three-wafer stacks. Because each added layer contributes only 12 microns to the thickness of the stack, chips with several layers will fit easily into standard chip packaging.

Unlike other 3D technologies, Tezzaron’s FaStack process enables an extremely dense array of vertical connectors – tens of thousands per square millimeter. The sheer number of interconnects allows the layers to behave as a single integrated circuit, a long-sought goal of 3D technology.

Tezzaron® Semiconductor is a privately held corporation with offices in Illinois and Singapore. For more information, visit www.tezzaron.com.

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