Another Giant Step Toward 3-D Silicon Jun29 By tezdev • Posted in Press Releases June 29, 2003 Vertical interconnects are tiny, precise, abundant A set of multi-wafer stacks – the first ever built with vertical through-silicon connections – demonstrates the electrical connectivity needed for tightly integrated 3-D semiconductor chips. The wafer stacks were created by Tezzaron Semiconductor using proprietary processes developed by that company. Before being bonded into a stack, each wafer was patterned with tiny connectors (Super-Vias™) embedded vertically in the silicon. Some of the Super-Vias were positioned to pierce only one wafer; others were designed to interconnect with Super-Vias on other wafers. Meticulous wafer alignment during the bonding process allowed these Super-Vias to interconnect according to design, creating conductive paths that pierced two or more wafers. In addition to providing electrical connectivity, Super-Vias address the worrisome issue of thermal buildup. Copper Super-Vias act as efficient radiators, dissipating heat that would otherwise be trapped between the silicon layers. Tezzaron also minimizes thermal buildup by ultra-thinning each bonded wafer to a depth of only 13 microns. Each of Tezzaron’s latest wafer stacks contains 3 or 4 eight-inch wafers. The Super-Vias are 4 microns in diameter, embedded at densities as high as 14,000 per square millimeter. Cross-section micrographs reveal wafer alignment that is precise to within 1/3 micron, providing ample overlap for connectivity; Tezzaron believes that future stacks can be built with smaller Super-Vias at higher densities. Greatly encouraged by the properties of these wafer stacks, Tezzaron plans to build functional 3-D prototype chips before the end of the year. These two micrographs each show a cross-section of a three-wafer stack. In both photos, the bottom wafer is face up, with silicon on the bottom and copper pads on the top; the upper two wafers are face down (silicon on the top). Three Super-Via™ connections are visible here – the leftmost connection pierces the top two wafers; the middle connection pierces all three wafers; the rightmost connection pierces only the bottom wafer. Five Super-Via™ connections are visible here – two pierce only the top wafer, two pierce the bottom, and the rightmost pierces all three wafers.