James T. Ayers, Jr.,
Chairman and CEO
Previous experience: Founder and President of James T. Ayers, Jr., P.C., a law practice specializing in small business consulting and commercial litigation; associate and later partner and shareholder of Clanahan, Tanner, Downing & Knowlton, P.C., Denver; Sergeant, Airborne Ranger, US Army; BSBA Cum Laude, accounting major, University of Colorado; JD, University of Colorado.
CTO and Acting VP of Production
Previous experience: Founder and President of the predecessor company, ASIC Designs, Inc.; Member of Technical Staff for Tellabs, Inc. Member of IEEE. Former Vice-Chairman of JEDEC’s DDRIII / Future Memories Task Group. Holder of 18 US patents, numerous foreign patents and many more pending patent applications in deep sub-micron semiconductor chip technologies; BS (EE/CS) and BS (Physics), Rose-Hulman Institute of Technology.
Previous experience: 20 years of capital market and investment management experience; Portfolio Manager and Research Analyst at Bank of America Capital Management, Founders Asset Management and Invesco Funds; Director of Research at Janco Partners and Wm Smith & Co.; Pennsylvania State University (MBA), Chartered Financial Analyst (CFA), Certified Management Accountant (CMA)
VP of Marketing
An unapologetic High Performance RAM-geek. Previous experience: VP of Marketing and Applications Engineering, GSI Technology; Mgr. of Product Planning & Applications Engineering, Motorola Memory Division; Manager of Memory Applications Engineering and Product Planning, Mostek; Technical Training / Curriculum Development positions at Olivetti, Apple and HP; over 30 years as active member of JEDEC standardization committees (high performance memory and interfaces); Founder of BurstRAM, MSUG (Late Write and DDR) and SigmaRAM/SigmaQuad Fast SRAM standards organizations; BA (Psychology), BS (Semiconductor Electronics), Texas Tech University
Dr. Subhash Gupta,
VP of Business Development
Previous experience: Adjunct Professor at National Institute of Singapore; VP of Singapore Technologies; a Fellow at Chartered Semiconductor Manufacturing; an AMD Fellow and Sr. Member of the Technical Staff, Advanced Micro Devices; various engineering management positions; National Research Council Fellow, NASA-Ames and MRI/SRI; Research Associate, University of Maryland and University of North Texas. Holder of more than 90 US patents, more than 40 scientific and technical publications; PhD., Indian Institute of Technology (IIT), Kanpur.
VP of Sales
Previous experience: President of his own semiconductor sales consulting company; VP of Sales, ZMD (mixed signal German Company) ASIC / NVSRAM, Sensor Interface ASIC products; Director of Business Development, ASIC Designs Inc.; North American Sales Manager, Swatch Group Semiconductor (Neuchatel Switzerland); Worldwide Manager of Sales, International Microcircuits, for clock generator products and gate arrays (Acquired by CYPRESS Semiconductor); other senior sales management positions. B.S.E.E., Northern Illinois University, De Kalb, IL
VP of Engineering
Previous experience: Director of Engineering, Tezzaron; Engineering Group Leader, Tachyon Semiconductor; Member of Tech Staff, ASIC Designs Inc.; MS (CE), Lehigh University; BE (EE), Regional Engineering College, Tiruchirappalli, India
Dr. Kenneth S. Su,
VP of Business and Technology Development in Asia
Previous experience: CEO and President, 3DS Logic Inc., California; Advisor to CEO, ADI Corporation, Taiwan; various positions at Lilly Research Laboratories, Indiana; various consultant positions; Adjunct Professor, Butler University, Indiana. Holder of 5 US patents, 8 books and chapters, 50 scientific and technical publications; PhD., University of Wisconsin, Madison
Dr. Sangki Hong,
Director of Operations
Previous experience: Senior Principal Engineer, Chartered Semiconductor Manufacturing; Senior Manager, Hynix; Member of Research Staff, Electronics & Telecommunication Research Institute/Korea. Holder of 13 US patents and 13 Korean patents, 14 scientific and technical publications; PhD. in Materials Science & Engineering, Stevens Institute of Technology, NJ